Performance Evaluation of a DySER FPGA Prototype - Nagaraju, Ranjini (My University, 2014)
Specialization and accelerators are being proposed as an effective way to address the slowdown of Dennard scaling. DySER is one such accelerator, which dynamically synthesizes large compound functional units to match program regions, using a co-designed compiler and microarchitecture. We have completed a full prototype implementation of DySER integrated into the OpenSPARC processor (called SPARC-DySER), a co-designed compiler in LLVM, and a detailed performance evaluation on an FPGA system, which runs an Ubuntu Linux distribution and full applications. Through the prototype, this report evaluates the fundamental principles of DySER acceleration. The key finding is that the DySER execution model and microarchitecture provides energy efficient speedups and the integration of DySER does not introduce overheads ? overall, DySER?s performance improvement to OpenSPARC is 6X.